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AT86RF232
11.5 Frame Buffer Empty Indicator
11.5.1 Overview
For time critical applications that want to start reading the frame data as early as
possible, the Atmel AT86RF232 Frame Buffer status can be indicated to the
microcontroller through a dedicated pin. This pin indicates to the microcontroller if an
access to the Frame Buffer is not possible since valid PSDU data are missing.
Pin 24 (IRQ) can be configured as a Frame Buffer Empty Indicator during a Frame
Buffer read access. This mode is enabled by register bit RX_BL_CTRL (register 0x04,
TRX_CTRL_1). The IRQ pin turns into Frame Buffer Empty Indicator after the Frame
Buffer read access command, see note (1) in Figure 11-15 , has been transferred on the
SPI bus until the Frame Buffer read procedure has finished indicated by /SEL = H, see
note (4) .
Figure 11-15. Timing Diagram of Frame Buffer Empty Indicator.
/SEL
SCLK
MOSI
Command
XX
Command
XX
XX
XX
XX
XX
XX
XX
Command
XX
MISO
PHY_STATUS IRQ_STATUS
TRX_STATUS
PHR[7:0]
PSDU[7:0]
PSDU[7:0]
PSDU[7:0]
LQI[7:0]
ED[7:0]
RX_STATUS
TRX_STATUS IRQ_STATUS
IRQ
IRQ_2 (RX_START)
Frame Buffer Empty Indicator
IRQ_3 (TRX_END)
t 12
Notes
(1)
(2)
(3)
(4)
Notes:
1.
2.
3.
4.
Timing figure t 12 refer to Section 12.4 .
A Frame Buffer read access can proceed as long as pin 24 (IRQ) = L.
Pin IRQ = H indicates that the Frame Buffer is currently not ready for another
SPI cycle.
The Frame Buffer read procedure has finished indicated by /SEL = H.
The microcontroller has to observe the IRQ pin during the Frame Buffer read
procedure. A Frame Buffer read access can proceed as long as pin 24 (IRQ) = L, see
note (2) . Pin IRQ = H indicates that the Frame Buffer is currently not ready for another
SPI cycle, note (3) , and thus the Frame Buffer read procedure has to wait for valid data
accordingly.
The access indicator pin 24 (IRQ) shows a valid access signal (either access is allowed
or denied) not before t 12 = 750ns after the rising edge of last SCLK clock of the Frame
Buffer read command byte.
After finishing the SPI frame receive procedure, and the SPI has been released by
/SEL = H, note (4) , pending interrupts are indicated immediately by pin 24 (IRQ). During
all other SPI accesses, except during a SPI frame receive procedure with
RX_BL_CTRL = 1, pin IRQ only indicates interrupts.
If a receive error occurs during the Frame Buffer read access the Frame Buffer Empty
Indicator locks on 'empty' (pin 24 (IRQ) = H), too. To prevent possible deadlocks, the
microcontroller should impose a timeout counter that checks whether the Frame Buffer
Empty Indicator remains logic high for more than 64μs. Presuming a PHY data rate of
250kb/s a new byte must have been arrived at the frame buffer during that period. If
not, the Frame Buffer read access should be aborted.
141
8321A – MCU Wireless – 10/11
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